Author(s): Janick Bergeron
Writing Testbenches: Functional Verification of HDL Models first introduces the necessary concepts and tools of verification, then describes a process for carrying out an effective functional verification of a design.
This book also presents techniques for applying a stimulus and monitoring the response of a design by abstracting the operations using bus-functional models. The architecture of testbenches built around these bus-functional models is important for minimizing development and maintenance effort.
Behavioral modeling is another important concept presented in this book. It is used to parallelize the implementation and verification of a design and to perform more efficient simulations. For many, behavioral modeling is synonymous with synthesizeable or RTL modeling. In this book, the term `behavioural’ is used to describe any model that adequately emulates the functionality of a design, usually using non-synthesizeable constructs and coding style.